SoC yield management – an emerging issue that could reshape the industry?

Read this interesting commentary by EDN’s Ron Wilson on Verigy’s acquisition of Inovys. While relating the ATE vendor’s acquisition as more towards acquiring Inovys’ failure localizing software, Ron has brought about an interesting emerging industry aspect

With “Time to entitled yield” becoming a critical metric especially for 65nm and below, it is doubtful if the existing distributed manufacturing model used between fabless companies and their foundry partners will suffice.  A closer loop is required which will cross the existing collaboration and contractual working relationships.And this leads to Ron’s observation – will we gradually see re-integration of design, test and failure analysis functions into real IDMs? 

Over the last couple of years, we have seen IDMs going towards fablite and fabless models, and the emerging dominance of the original pure play foundries. I say “original” as lately these foundries are paving their way into newer territories like climbing up the design support value chain by increasing their IP portfolio, collaborating with EDA vendors for providing yield related data/information to the designers and reference design flows,  and others – just short of coming up with their own ASSPs. 

So will we see the re-emergence of real IDMs albeit in the form of a morphed foundry??

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