21st November 2005

Can someone explain DFM ?

posted in EDA |

Quite an interesting article in Electronic Engineering Times by Richard Goering.

Getting to basics ….

In commercial space, a designer designs a chip with the objective that it should not only function as per specs but also be manufactured in a commercially viable mode. This is implicit. Else shouldn’t we have heard about tools like Design for Silicon Success/DFSS or DFFTSS….??

Yes, we do have flows which aim for FTSS but not point tools. The point tools facilitate various design phases like simulation, synthesis, routing etc. but it’s a design flow which optimizes their usage to achieve objectives like intended functionality , high yield. In fact, all the existing design tools should have this “DFM” embedded in them by default.

Designers need not become manufacturing experts and the tools should be good enough to handle the yield issues in a transparent and automatic manner. But with the mandatory breaking of walls between design and manufacturing in the DSM zone, it does help for the designer to be aware of the potential manufacturing issues and take them into account while designing in order to avoid corrections at later stages.

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