25th April 2007

ESL tool targets algorithm for FPGA, ASIC devices

posted in ASICs, EDA |

Synplicity rolled out its Synplify DSP ASIC Edition software at the Design Automation and Test Europe conference in France. Their earlier ESL synthesis tool was aimed at FPGA designs. With this new offering, they are targeting customers who use FPGA prototyping for their DSP based ASICs.

Another recent news has been that TSMC is broadening its IP portfolio giving worries to IP providers and speculation in the industry whether TSMC is moving towards ASIC like biz model.

Gives a new meaning to the phrase “ASIC demise”………

This entry was posted on Wednesday, April 25th, 2007 at 7:50 pm and is filed under ASICs, EDA. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.

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