3rd July 2012

Fab Power

Looks like the scaling down road for fabless – foundry model is getting bumpier. First the high cost of setting up new fabs made the earlier IDMs get into the fab lite model – i.e. depend upon the pure play foundries for the basic process capacity and do the specialized process add-ons in-house to get the competitive advantage. The fabless companies too coupled with pure-play foundries and gained prominence. The industry seemed to have found a way out (at least temperoraliy) of the high cost challenges of scaling down coupled with the issues of designing multimillion gates chips with increasing features and decreasing time to market window.

But now the speed breakers on this road are getting frequent and higher. Take the last couple of examples. FD-SOI is one of the new transistor architectures thrown up by ST/ST-Ericsson for scaling down 28nm and below. The process is reported to give a 35% power performance gain and that too by a simpler process transition from the typical CMOS. But ST lacks the capacity and hence is exploring options with GlobalFoundries. The latter is reportedly insisting that it will use ST’s process to make parts for all other parties too, in exchange for this extra capacity – leading to ST/ST-E potentially losing on a big competitive edge of sole access to a proprietary process through its FD-SOI process.

The second recent example is of Qualcomm. The world’s largest fabless company uses TSMC‘s 28nm process to manufacture its Snapdragon S4. And the world’s largest pure play foundry has had yield/capacity issues on this node.

TSMC’s 28nm foundry capacity woes have put a dampener in the presently exclusive run of Qualcomm – the sole (at least presently) provider of integrated multimode 3G/4G LTE baseband chips. And it ripples further down the chain causing distress to LTE smartphone vendors. Shortage is not expected to cease before Q4’12. Qualcomm is now planning a 23 per cent increase in operating expenses this year and looking for alternative (apart from TSMC) suppliers. It’s CEO Paul Jacobs’s recent visit to Samsung, reportedly for discussions that included semiconductor supply as well as his comment of not ruling out owning the means of chip production has led to a lot of water cooler speculation.

Incidentally TSMC’s sales hit an all-time high (9.1% annual revenue growth) in April’12 – with much of the strong growth attributed by 28nm demand!

So where does this leave the fabless-foundry model? And how does this affect the IDMs?

One thing for sure is that the model will need to be tweaked in order to stand up to the sub 28nm/20nm challenges. Some pointers:

• Cost advantage of scaling down is diminishing for the foundries. The cost-per-transistor has been about 29% per node leading to cheaper scaled down chips. 28nm and sub has seen that levelling off for the foundries. Intel still has a big (at least a couple of years) lead in the process race. If the fabless companies do not see a steady decline in the cost-per-transistor in their foundries’ scaling, it certainly puts a spoke in their continuing down on the scaling path with this model.

• The prohibitive high cost of setting up a new fab and the related R&D and yield challenges just does not make sense for a fabless company, even Qualcomm, to start one. Owning a pre-planned and negotiated capacity or even production means with an existing foundry – yes but a fab from scratch, no, that doesn’t appear to be a viable option.

• With the increasing yield issues at smaller geometries pitched along with capacity shortage and uncertain market demand, a stronger vertical integration of supply chain may become the order of the day to sustain the fabless model – one which accounted for $64.9 billion in 2011. While expecting to resolve 28nm capacity shortage by Q4, TSMC has raised this year’s capex 42% to USD 8.5 billion to ride the market opportunities.

• Rewinding to one of my earlier blog posts (Jan 2008), I had cited a remark by Infineon’s CEO, Ziebart in an interview to EE Times’ rick Merritt, “The major thing giving semiconductor makers a competitive advantage has evaporated. Today everyone has access to the same process technology at roughly the same time. This access used to be what differentiated the best from the worst semiconductor companies, but now it has evaporated, What’s replacing process technology as a differentiator is systems know how, and it must be specific to a market area”. My comment to that, as also mentioned in the same post, was: Yes, the differentiator has moved from process technology; but it is due to access to the process techno. This access has become cost prohibitive for any single semiconductor company (perhaps leaving aside a couple with really deep pockets) and hence the scramble to find an alternate place in the value chain to survive.
That access to the process techno is now morphing, if not under threat.

• GlobalFoundties’ SVP Mojy Chian mentioned that “New challenges at 20nm and beyond will require deep, IDM-like collaboration to accelerate the time-to-market”. Now, does this mean that foundries will transition towards virtual IDMs?
Rewind to another earlier blog post (Dec 2007): “Over the last couple of years, we have seen IDMs going towards fablite and fabless models, and the emerging dominance of the original pure play foundries. I say “original” as lately these foundries are paving their way into newer territories like climbing up the design support value chain by increasing their IP portfolio, collaborating with EDA vendors for providing yield related data/information to the designers and reference design flows, and others – just short of coming up with their own ASSPs. So will we see the re-emergence of real IDMs albeit in the form of a morphed foundry??
IDMs, foundries, fabless… they are all morphing from their original identities and are reshaping the industry with their redefined (work in progress) grey and diffused boundaries

However, one thing stands tall amidst all this and that is “The “Fab power’ is increasingly getting honed into the semiconductor eco-system lately.” Fab matters

This entry was posted on Tuesday, July 3rd, 2012 at 11:55 pm and is filed under Semiconductor, Process, Business, Foundry, Fabless, Technology, Samsung, Qualcomm, Intel, Ecosystem, chip design. You can follow any responses to this entry through the RSS 2.0 feed. You can leave a response, or trackback from your own site.

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