Travelling On The Silicon Road

I recently read this article in a book, Heart Works, which is a compilation of snippets by various high profilers on how the Economic Development Board (EDB), Singapore steered the country into the 21st century.

The article, authored by Mr. Lim Swee Say who held several senior appointments in EDB, recalls how they chased the wafer fab projects in Singapore in around 1994. In a great show of synergy, several players pitched in - banking community for funding, specialist manpower, training and knowledge upgrading schemes were made available to graduates and universities were roped in, National Science and Technology Board (now A*STAR) helped to build capabilities in wafer fab process and IC design technology and JTC Corporation pitched in with developing & servicing the fabs along with the service utility entities.

Their first wafer fab project was for Hitachi and an amusing anecdote is about how midway through digging up and preparing the land for the fab, they hit on a rubbish dump which had to be cleared away.

The news would have read “Singapore’s most modern fab sited on a rubbish dump”!

SMIC’s CEO, Dr. Richard Chang announced late last month of the starting of a new IC production project in Shenzhen. Unlike its predecessors, in this project SMIC will register an independent legal entity, the Semiconductor Manufacturing International (Shenzhen) Corporation Ltd., which will set up an IC technology research and development center, an 8-inch wafer production line and a 12-inch fab.” SMIC will use the 300mm facility for 45nm bulk CMOS fabrication in relation to the recent process licensing deal it has struck with IBM.  

SMIC has been successful in gaining significant financial support and services from Chinese regional governments in establishing semiconductor manufacturing facilities in specific regions in the last 18 months. A number of such facilities have been termed as “virtual fabs” - Under this approach, a municipality owns the facility and SMIC manages it, garnering fees and a share of the profit for its troubles. (Though it may receive some government funding for the fabs announced last month, SMIC apparently will own them.)

Now while pure play foundries like TSMC, UMC and Chartered have reduced their capital spending plans keeping in mind a probable recession, SMIC plans to buck the trend and boost its capacity by 31% by year end – prompting fears of a capacity glut which may kick off a price war.

SMIC’s virtual fab strategy has drawn its share of critics who claim that it does not give a level playing field from the financial point of view. However, it’s to be noted that government investment in semicon industry is not new. The point is whether this has given SMIC the initial boost to catch up with the top players. Also with the Shenzhen deal with SMIC owned fabs, SMIC may be re evaluating its virtual fab strategy. 

With China’s semiconductor market, driven by computing & consumer electronics demand predicted by IDC to top  $28 B in 2008 & coupled with the fact that SMIC has distanced itself from it’s initial focus on DRAMs, this expansion may not be such a bad idea for SMIC.

In the interview to EETimes’ Rick Merritt, Infineon’s CEO, Ziebart mentioned that semiconductor companies need to shift their focus from building fabs to building systems, and they must engage with customers at deep technical levels if they are to survive the current wave of consolidation.

“The major thing giving semiconductor makers a competitive advantage has evaporated. Today everyone has access to the same process technology at roughly the same time. This access used to be what differentiated the best from the worst semiconductor companies, but now it has evaporated, What’s replacing process technology as a differentiator is systems know how, and it must be specific to a market area”, he said.

This has initiated several comments on the blogosphere. Let me add my two penny’ worth to that:

In the past, the process technology was the competitive edge. Later the escalating costs (& risks) involved with building new fabs & developing new processes left one with little option but to pool in resources and consolidate (to compete with the rising prominence of  original pure-play foundries); giving rise to alliance like Crolles and later the Common Platform Alliance. IDMs shared their resources for the basic process and individually derived some spin-offs for differentiation & niche. This competitive edge was further complemented and later more or less replaced with strong IP portfolio which has grown over the years from a block to platform to “platform plus services”.

Moving to system level is a natural progression in this path.

Yes, the differentiator has moved from process technology; but it is due to access to the process techno. This access has become cost prohibitive for any single semiconductor company (perhaps leaving aside a couple with really deep pockets) and hence the scramble to find an alternate place in the value chain to survive.

A point to be noted here is to follow how the foundries have also evolved over this period –  from pure play to design support to building an IP portfolio to……. “systems know how”???

Amidst the bleak forecasts for the semicon industry for 2008 including the projected decline by 10% in capital spending, a sector expected to post strong growth this year is the used semiconductor equipment market. According to a report from Semiconductor Partners in conjunction with Semicon Research, Used semiconductor equipment market is expected to reach $8 billion in 2009

 “As leading edge digital memory and logic manufacturers build 300mm fabs for process technologies of 65nm or less, this will obsolete their 200mm fabs at 130nm or 90nm and some of their 300mm fabs at 90nm,” noted Morry Marshall, Partner – Strategic Technologies at Semiconductor Partners. “Analog and mixed signal manufacturers will have a need for these fabs to meet for expansion to satisfy the growing analog, mixed signal and RF markets.  This creates an opportunity for companies that finance, resell or refurbish used equipment.”

IDMs have re-aligned their fab strategies and are going towards fabless or fablite. Plus the ASP declines have catalysed foundries towards the 300mm wafer path, thus giving a boost to the 200mm used equipment market; in particular  from foundries in Asia. While on foundries in Asia, Chartered has been on the speculation radar

Read this interesting commentary by EDN’s Ron Wilson on Verigy’s acquisition of Inovys. While relating the ATE vendor’s acquisition as more towards acquiring Inovys’ failure localizing software, Ron has brought about an interesting emerging industry aspect

With “Time to entitled yield” becoming a critical metric especially for 65nm and below, it is doubtful if the existing distributed manufacturing model used between fabless companies and their foundry partners will suffice.  A closer loop is required which will cross the existing collaboration and contractual working relationships.And this leads to Ron’s observation – will we gradually see re-integration of design, test and failure analysis functions into real IDMs? 

Over the last couple of years, we have seen IDMs going towards fablite and fabless models, and the emerging dominance of the original pure play foundries. I say “original” as lately these foundries are paving their way into newer territories like climbing up the design support value chain by increasing their IP portfolio, collaborating with EDA vendors for providing yield related data/information to the designers and reference design flows,  and others – just short of coming up with their own ASSPs. 

So will we see the re-emergence of real IDMs albeit in the form of a morphed foundry??

Over the last few years, we have been seeing IDMs outsourcing their digital production needs to the foundries. Now looks like, a similar path may be taken by the big analog IDMs too – or at least “their interest level in outsourcing has dramatically increased”, as per Thomas Hartung, VP of Sales & marketing for X-Fab.

Read a couple of interesting articles which highlight this potential move; here are few points from them which I’d like to share:

For years, analog IDMs have manufactured the bulk of their products in-house, shipping only a small percentage to foundries, for a number of reasons.

-    Many analog products do not require leading-edge fabs or processes. -    Most analog ICs have relatively small die sizes and wafer volumes are hence low as compared to their digital counterparts ; this does not work well with outside foundries-    Analog products generally have longer life cycles and can be made cheaply in older fabs for several years.

Fuelling the ambition to become a leading provider of chip design services and IPs i.e. in addition to the top post of pure play foundry, TSMC has acquired Ottawa’s memory IP start-up, Emerging Memories Technologies Inc. (EMT).  

EMT, a start-up with a relatively small group of memory technologists (and headed by 39 year old Sreedhar Natarajan) specializes in the design and licensing of leading-edge embedded memory technology in both bulk CMOS and SOI and was launched in 2004 when the memory design biz of Atmos Semiconductor was taken by Mosys. Many employees at Mosys moved to EMT – and now will move to TSMC.

As I noted in an earlier post on a similar topic in May this year - call it as seismic changes or consolidation, the chip manufacturing world is going through some upheaval.

Ron Wilson, executive editor of EDN makes an interesting take on the low power SoC trend. He writes about the change in significance of low power design. Pre 90nm, low-power design was something you did in response to a specific application requirement. Post 90nm, according to tool vendors at least, low-power design is something you do so that the chip can work at all. This suggests that tools for invasive low-power design will be a gating factor in the industry’s migration to 65 nm and certainly beyond. And if there’s one thing that increases the–shall we say—intimacy of the relationship between the foundries and the EDA industry, it’s an obstacle to wafer shipments. 

I refer to this as yet another example of the expanding role & growing prominence of foundries. To fill their billion dollar fabs, they have to catalyse solutions for issues which may deter new design starts. So, if low power tools is a gating factor, they will “collaborate” with the EDA vendors. As I noted in an earlier post, Virtual vs. Vertical, it is the same for DFM; here too foundries started working together with the EDA vendors with information & data that was once under wraps. 

As they say, it is the economics!