31st March 2007

The dilemma of two languages in low power design

So, hopes of a single power format seem remote and it is increasingly likely that the industry will need to support both standards i.e. CPF as well as UPF. Well, now the market forces will decide the winner……

posted in EDA | 0 Comments

31st March 2007

HSMC to chip in 4 bn$ for Indian fabs

I had reported in an earlier post “India outlines long awaited IC policy”, that the Indian govt.’s announcement of Special Incentives Package Scheme is likely to be followed by announcements by potential investors.

While SemIndia had already proposed investment in partnership with AMD, the latest one is from Hindustan Semiconductor Manufacturing Corporation (HSMC), a Silicon Valley-based semiconductor company. It has announced its plans to invest over $4 billion in chip foundries in India and has roped in Infineon as its technology partner; Infineon will license its 0.13u process techno and has said that it is open to considering an equity participation ‘subject to the final contract’.

According to a study by Frost and Sullivan, the semiconductor market in India is expected to grow from $3.25 billion in 2006 to $36 billion in 2015. The Indian govt. has announced Special Incentives Package Scheme, MoUs are being signed, what is to be seen now is the implementation of these plans and the coming up of the fabcities.

posted in Foundry | 0 Comments

20th March 2007

India’s semiconductor policy - the ongoing debate

Read this article (Nadamuni says, in EE Times) ; Wanted to submit my comments there but looks like a perpetual error while submitting comments…..

2 issues which could be of concern to the fledgling Indian semiconductor market are: potential overcapacity situation and offering an attractive pricing strategy in face of strong competition from established regional foundries.

Investing with new equipment in light of the above and especially with the unavailability of incentives for such plants i.e. with second hand semiconductor equipment will make the potential investors wary.

However, having said that, if India were to offer the same set of incentives for second hand semicon equipment too, it’ll take a long time for it to catch up with cutting edge technology fabs as well as to address the design needs of the local design houses which have emerged from working on trailing edge technos to the leading edge ones.
Perhaps, a different set of incentives could work……???

posted in Semiconductor, Business | 0 Comments

19th March 2007

UMC to open support office in India

UMC has announced that it plans to open a support office in Hyderabad, India. The main charter is to support India based customers. This is close on heels with TSMC’s setting up office in Bangalore, India.

posted in Business, Foundry | 0 Comments

12th March 2007

Are ASICs dead?

There were some very interesting insights from the commentary on the panel discussion on the above topic.

People have been long talking about the demise of ASICs….and these are still around. A good starting point taken, hence, was the definition of ASICs itself. ASICs have undergone a transformation over the years and have evolved much from the traditional cell based ASICs.

Some interesting comments raised included:

- why have ASICs survived? Inspite of ridiculous prices, extremely unreliable and extremely unpredictable. Because they are needed. People talk about a decline in design starts…I think what we should be talking about is how many total transistors, total functionality and how much total revenue is being shipped. All of those numbers are increasing (Sherwani/OpenSilicon)
- Architecture is the key. More integration is not necessarily the right solution (Massabki/ChipX)
- How outsourcing and offshoring of basic R&D is affecting ASIC biz (Sherwani)

When we talk about ASICs declining, what are we referring to? Is it the number of design starts? And if so, which designs does this number include: cell based ASICs, embedded array, structured ASICs? Is it the total revenue?

Without a clear definition and specific measuring criteria, blanket statements do not make much sense.

posted in ASICs | 1 Comment

9th March 2007

Cisco, IBM team up on open standards communication platform

Cisco and IBM are planning to develop a platform based on open standards to allow unified communications and collaborations in their applications. IBM will offer a set of application programming interfaces (APIs) as a subset of its Lotus Sametime collaboration software and Cisco will offer communication APIs for accessing voice and video services.
Cisco and IBM also will roll out “specific client offerings” based on the new platform and a set of “plug-ins” to combine the collaboration and unified communications capabilities of both companies.

I had written about the adoption of a similar approach in the EDA industry (Why can’t we do it in EDA). Especially with DFM and other UDSM challenges (and not to mention the standards’ war!), it is to the advantage of the designer if he can get the best of all tools in a unified integrated design flow. Since no single vendor can handle this on its own, a collaborative approach looks to be the best bet.

posted in Business, Communciation | 0 Comments

6th March 2007

Integrated DFM solutions still lacking

Walter Ng, senior director of platform alliances at Chartered Semiconductor Manufacturing noted in his presentation at the SPIE Advanced Lithography Conference last week that while there are some good point tools for DFM, integrated DFM solutions are still lacking.

As I noted in an earlier post, Why can’t we do it in EDA?, it is a huge task for a single vendor to handle even most of the important sources of variations through a single integrated flow. Integration of point tools requires standardization as well as agreement over interfaces and formats.

IBM’s Leon Stok had identified 4 eras in the EDA industry. For the 4th era i.e. design implementation platforms, he mentioned that we would need to define standards as APIs in order to allow tools to talk to each other.

The trend is moving more and more towards a hybrid approach

posted in EDA | 0 Comments

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