A highly interesting article in Electronic Business by Tam Harbert.
Private equity firms target cash rich semiconductor entities, leverage on its cash flow to borrow more funds and then restructure, improve the company’s bottom line and then sell it or take it public; providing returns of 30-40%. Tam lists the reasons behind recent LBOs in the semiconductor space – industry being driven by the less cyclic consumer market, transition to fab-lite/fabless models and a better control over inventory.
The question which arises is that why hasn’t the chip industry taken the necessary steps to consolidate and leave that task to the private equity guys? iSupply’s Derek Lidow cites portfolio management as the reason. While chip companies, usually run by engineers structure the portfolio on technology, private equity folks tend to manage groups of products on market segments and geographical regions; rather than technology criterion. They acquire and merge companies that have similar product portfolios.
While on mergers and acquisitions, Mentor Graphics’ CEO, Wally Rhines mentioned in a recent article that the role of acquisitions in EDA industry is set to change. As the acquisitions in the past few years have failed to garner commensurate market capitalization, he opines that companies will either pay less for acquisitions or stop making them.
posted in Semiconductor, Business |
Gartner predicts that there will not be any major fab investments for India in 2007. There indeed is a lot of buzz for India in the design space. It has led to major collaborations as well as investments. Global contract manufacturers have entered with an eye on the huge local market potential. While a few consortia have plans, some of which have started on their first stages, it will take some time before any further significant investment is done towards setting up fabs and moving India to a design plus manufacturing hub.
posted in Business, Foundry |
Yet another DFM tool in the market.
DFM Blaze announced a DFM tool, Blaze IF, to address topology variations caused due to CMP. It intelligently inserts dummy metal fill patterns into a design layout taking into account not only the design requirements like power and timing needs, but also the electrical issues like signal integrity and IR drop – which traditional approaches to metal fill do not accomplish.
This is in addition to the announcement of Blaze MO, announced earlier this year which provides guidance to OPC tool used in manufacturing through an annotation layer in the GDSII database. The tool optimizes the design by small tweaking of the gate lengths (within the process limits) for reducing leakage power and improving timings and provides this guidance to the OPC tool.
All these aim to bridge the gap between design and manufacturing. Instead of a blanket set of rules for the complete design, design specific and design objectives’ relevant optimizations are carried forward to the manufacturing. Making it an integral part of the flow before handoff to manufacturing is a step closer to address issues arising out of the open loop caused by changes made to the design after handoff – oblivious to the design issues which may be impacted.
posted in EDA |
In October 2005, John Chambers, Chairman and CEO Cisco Systems had announced a 1.1 B$ investment in India. In his recent visit to India last week, he re-iterated Cisco’s commitment while outlining the importance of India in Cisco’s global growth strategy.
Cisco’s key investments in India include a new R&D campus in Bangalore, increasing by threefold its local workforce, launching a manufacturing pilot facility for local market and allocating funds for venture capital investments in high growth and nascent companies based in India. Investments are expected in companies involved in broadband content and digital media.
All these are in line with John’s vision of the network becoming the platform for all forms of communication and ICT – also the topic of his interesting talk in Singapore last Friday.
posted in Business |
Qualcomm, with its IFM (Integrated Fabless Manufacturing) strategy is quietly but steadily decreasing the gap between itself and IDMs in new process adoption time. The world’s largest fabless design company is leading the way in how the fabless design community needs to overcome the DSM hurdles of the widening gaps between IC design and manufacturing flows.
While not exactly striving to be process experts, Qualcomm has formed a virtual manufacturing organization including its VLSI Technology organization and DFX unit which has helped it to understand, appreciate and thus resolve a host of complex and costly issues. The results, closing of the technology gap with the IDMs, are the proof.
They are cautious enough, though, as to not necessarily be the first ones to ship out a new product on a new technology node.
With Paul Jacobs’ strategy of making people understand that Qualcomm is a wireless technology company and not just a CDMA company, it needs all the efforts and results to zoom to the next node in a competitive manner.
posted in Business, Fabless |