4th June 2014

Semiconductor and Cloud

A couple of years back, I had given a talk as well as moderated a panel on chip design and cloud. I had written about the same later in one of my blog posts, Chip designing and the Cloud.

I ended the article with “In summary, cloud computing in chip design will be a big paradigm shift and is poised to bring about tremendous benefits to the design eco-system. However for the design community to actively adopt it, the relevant stakeholders need to look into it in a holistic way and much beyond the scalable and economic computing power and data storage combo. And this may very well redefine the existing chip design methodology.”

So the recent news on Silicon Cloud International bringing together ecosystem partners for chip design at DAC was quite heartening to note.

SCI establishes secure cloud computing centers for scientific and engineering applications across the world. As an initial application, SCI’s cloud is providing turn-key design-to-manufacturing semiconductor design workflows for universities and research institutions. SCI’s private cloud and thin client architecture establishes a novel security model for semiconductor ecosystem providers and users.

posted in Semiconductor, Ecosystem, Cloud, chip design | 0 Comments

21st May 2013

How will ST’s new two product oriented business segments organization strategy pan out?

Georges Penalver, chief strategy officer for ST, told the analysts community recently that ST is being constructed as two product-oriented business segments organization. The first block encompasses ST’s sensor, power and automotive products and is essentially ST’s successful analog business and its digital automotive business. The second block is ST’s embedded processing business and is the non-automotive digital business including microcontrollers and processors for digital consumer applications.

 

Focusing on the Embedded processing segment and ST’s manufacturing strategy, let’s look into some statements from the earnings call last month:

·       The 1st segment i.e. Sensor, Power & Automotive represented 56% of net revenues and the 2nd segment (Embedded Processing Solutions) 44%

·       Wireless saw a significant decrease due to ST-Ericsson and this will continue. LTE Modem development activity and biz has moved to Ericsson

·       ST will not compete in the application processor market in smartphones

·       Microcontrollers are a key driver in the Embedded Segment; the others are STB (set top boxes), TVs, digital ASICs, Imaging etc.

·       ST will focus on 2 segments in Microcontrollers. The first one is wearable electronics (healthcare, automotive, gaming) where it caters to diverse and small size customers (requirement is for low power microcontrollers, sensors and connectivity). The second one is secure microcontrollers (which is more for smartphone applications (NFC), banking - both contact and contactless) catering to a smaller number of customers but for a likely high volume

·       Digital biz will be in 300mm wafer fab in Crolles

·       Manufacturing distribution in Crolles: 1/3rd each into MCU, CMOS image sensors and dig consumer products

·       ST is betting big on FD-SOI tech. It has second source agreement with GlobalFoundries for selected customers for this techno. Here it is working aggressively on 2 fronts – 1st is communication infrastructure where low power dissipation is important along with strong performance. The other is portable equipment (outside smartphones, tablets)

 

Add to that the fact that the major semiconductor growth (last year and projected this year too) are the mobile consumer devices especially smartphones and tablets as well as the wireless communication sector.

 

Keeping the above in mind, it will be a big challenge for the company to support leading edge technologies in Crolles and that too with an allocation of a third of its capacity for digital consumer products – case of an expensive leading edge digital technology without targeting aggressive margins. So, how ST can keep its IDM model, especially on the leading digital edge with this kind of a product segment organization strategy, economically viable – that’d be interesting to watch.

 

What are your thoughts?

posted in Semiconductor, Business, Foundry, Communciation, Blogroll, Technology, MIDs, chip design, connectivity, Mobile, STM, IDM | 0 Comments

14th February 2013

Internet of Things (IoT) and the opportunities for chip biz

There has been a lot of talk on Internet of Things (IoT) or Machine2Machine (M2M) communications – which basically is an intelligent grid of devices connected to each other through the internet. Chips are embedded in the devices enabling them to relay information, take decisions, communicate commands and adjust settings/implement a requisite action(s) accordingly.

As per a report from ABI Research, over five billion wireless connectivity chips will ship in 2013.

What does this mean for the chip biz?

Some basic things that various devices involved in this IoT will include are: wireless connectivity (mostly low power unless one or more of these devices is connected to the mains), sensors, MEMs and control units.

The control units here needn’t be too fancy – efficient and sufficient enough to do the task they are assigned for. They span from low end to high end depending on the computing power required for the control functions - served by MCUs, embedded processors. The sensors (for temperature, pressure, moisture, light etc.) are coupled with accelerometers, gyroscopes and the like.

Connecting to the internet – wirelessly and power efficiently – that will be the key for connectivity stake holders in this space. Nuel has come up with an interesting way to achieve this. It recently announced a white space (unused frequencies during TV channels’ transmission) radio chip for low power communications and come out with a chip to demonstrate the same (it implements the “Weightless’ specifications)

One thing I find interesting about IoT/M2M is that it does not have any defined market space/application. There are potentially several applications, several markets where these can find their way. So, while one can chose to specialize in servicing one market/application, a choice of providing a generic chip/platform (control/sensor/connectivity) for any or combination/integration (SoC) of the components of the basic fabric for any (or at least most of the applications) is also wide open.

However, for the application to catch on, it has to be implemented in an inexpensive way and should be easy to use - and that is where we’ll see some exciting innovation & integration happening

posted in ASICs, Semiconductor, Business, Communciation, Technology, Hardware, Ecosystem, chip design, Market trend | 0 Comments

3rd July 2012

Fab Power

Looks like the scaling down road for fabless – foundry model is getting bumpier. First the high cost of setting up new fabs made the earlier IDMs get into the fab lite model – i.e. depend upon the pure play foundries for the basic process capacity and do the specialized process add-ons in-house to get the competitive advantage. The fabless companies too coupled with pure-play foundries and gained prominence. The industry seemed to have found a way out (at least temperoraliy) of the high cost challenges of scaling down coupled with the issues of designing multimillion gates chips with increasing features and decreasing time to market window.

But now the speed breakers on this road are getting frequent and higher. Take the last couple of examples. FD-SOI is one of the new transistor architectures thrown up by ST/ST-Ericsson for scaling down 28nm and below. The process is reported to give a 35% power performance gain and that too by a simpler process transition from the typical CMOS. But ST lacks the capacity and hence is exploring options with GlobalFoundries. The latter is reportedly insisting that it will use ST’s process to make parts for all other parties too, in exchange for this extra capacity – leading to ST/ST-E potentially losing on a big competitive edge of sole access to a proprietary process through its FD-SOI process.

The second recent example is of Qualcomm. The world’s largest fabless company uses TSMC‘s 28nm process to manufacture its Snapdragon S4. And the world’s largest pure play foundry has had yield/capacity issues on this node.

TSMC’s 28nm foundry capacity woes have put a dampener in the presently exclusive run of Qualcomm – the sole (at least presently) provider of integrated multimode 3G/4G LTE baseband chips. And it ripples further down the chain causing distress to LTE smartphone vendors. Shortage is not expected to cease before Q4’12. Qualcomm is now planning a 23 per cent increase in operating expenses this year and looking for alternative (apart from TSMC) suppliers. It’s CEO Paul Jacobs’s recent visit to Samsung, reportedly for discussions that included semiconductor supply as well as his comment of not ruling out owning the means of chip production has led to a lot of water cooler speculation.

Incidentally TSMC’s sales hit an all-time high (9.1% annual revenue growth) in April’12 – with much of the strong growth attributed by 28nm demand!

So where does this leave the fabless-foundry model? And how does this affect the IDMs?

One thing for sure is that the model will need to be tweaked in order to stand up to the sub 28nm/20nm challenges. Some pointers:

• Cost advantage of scaling down is diminishing for the foundries. The cost-per-transistor has been about 29% per node leading to cheaper scaled down chips. 28nm and sub has seen that levelling off for the foundries. Intel still has a big (at least a couple of years) lead in the process race. If the fabless companies do not see a steady decline in the cost-per-transistor in their foundries’ scaling, it certainly puts a spoke in their continuing down on the scaling path with this model.

• The prohibitive high cost of setting up a new fab and the related R&D and yield challenges just does not make sense for a fabless company, even Qualcomm, to start one. Owning a pre-planned and negotiated capacity or even production means with an existing foundry – yes but a fab from scratch, no, that doesn’t appear to be a viable option.

• With the increasing yield issues at smaller geometries pitched along with capacity shortage and uncertain market demand, a stronger vertical integration of supply chain may become the order of the day to sustain the fabless model – one which accounted for $64.9 billion in 2011. While expecting to resolve 28nm capacity shortage by Q4, TSMC has raised this year’s capex 42% to USD 8.5 billion to ride the market opportunities.

• Rewinding to one of my earlier blog posts (Jan 2008), I had cited a remark by Infineon’s CEO, Ziebart in an interview to EE Times’ rick Merritt, “The major thing giving semiconductor makers a competitive advantage has evaporated. Today everyone has access to the same process technology at roughly the same time. This access used to be what differentiated the best from the worst semiconductor companies, but now it has evaporated, What’s replacing process technology as a differentiator is systems know how, and it must be specific to a market area”. My comment to that, as also mentioned in the same post, was: Yes, the differentiator has moved from process technology; but it is due to access to the process techno. This access has become cost prohibitive for any single semiconductor company (perhaps leaving aside a couple with really deep pockets) and hence the scramble to find an alternate place in the value chain to survive.
That access to the process techno is now morphing, if not under threat.

• GlobalFoundties’ SVP Mojy Chian mentioned that “New challenges at 20nm and beyond will require deep, IDM-like collaboration to accelerate the time-to-market”. Now, does this mean that foundries will transition towards virtual IDMs?
Rewind to another earlier blog post (Dec 2007): “Over the last couple of years, we have seen IDMs going towards fablite and fabless models, and the emerging dominance of the original pure play foundries. I say “original” as lately these foundries are paving their way into newer territories like climbing up the design support value chain by increasing their IP portfolio, collaborating with EDA vendors for providing yield related data/information to the designers and reference design flows, and others – just short of coming up with their own ASSPs. So will we see the re-emergence of real IDMs albeit in the form of a morphed foundry??
IDMs, foundries, fabless… they are all morphing from their original identities and are reshaping the industry with their redefined (work in progress) grey and diffused boundaries

However, one thing stands tall amidst all this and that is “The “Fab power’ is increasingly getting honed into the semiconductor eco-system lately.” Fab matters

posted in Semiconductor, Process, Business, Foundry, Fabless, Technology, Samsung, Qualcomm, Intel, Ecosystem, chip design | 0 Comments

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